Programmable logic devices (PLDs) exist as a well-known type of integrated circuit (IC) that may be programmed by a user to perform specified logic functions. There are different types of programmable logic devices, such as programmable logic arrays (PLAS) and complex programmable logic devices (CPLDs). One type of programmable logic device, called a field programmable gate array (FPGA), is very popular because of a superior combination of capacity, flexibility, time-to-market, and cost.
An FPGA typically includes an array of configurable logic blocks (CLBS) surrounded by a ring of programmable input/output blocks (IOBs). The CLBs and IOBs are interconnected by a programmable interconnect structure. The CLBs, IOBs, and interconnect structure are typically programmed by loading a stream of configuration data (bitstream) into internal configuration memory cells that define how the CLBs, IOBs, and interconnect structure are configured. The configuration bitstream may be read from an external memory, conventionally an external integrated circuit memory EEPROM, EPROM, PROM, and the like, though other types of memory may be used. The collective states of the individual memory cells then determine the function of the FPGA.
An important step in the manufacture of PLDs is testing microchips prior to shipment to a customer. Chip handlers and testers are cost prohibitive, however, so PLD designers have developed test circuits on PLDs to reduce test time. This type of circuitry is conventionally known as “Built-In Self-Test” or “BIST”. In general, BIST circuitry includes configurable logic that may be programmed to perform test functions. BIST circuitry, however, provides only a general indication that a given device contains a fault. In general, BIST circuitry does not provide any indication of the location of the fault within the device.
Accordingly, it would be both desirable and useful to provide a method and apparatus for localizing faults within a programmable logic device.